 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| INTEGRATED CIRCUITS DATA SHEET TZA1032 Laser driver and controller circuit Preliminary specification 2002 May 06 Philips Semiconductors Preliminary specification Laser driver and controller circuit CONTENTS 1 2 3 4 5 6 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION The I2C-bus interface Interrupt request Soft reset and power-down The Phase Locked Loop The differential receiver The RLC decoder Write strategy generator Laser Power Control 8 9 10 11 12 13 14 15 FUNCTIONAL DIAGRAM CHARACTERISTICS TZA1032 APPLICATION INFORMATION BONDING PAD LOCATIONS DATA SHEET STATUS DEFINITIONS DISCLAIMERS PURCHASE OF PHILIPS I2C COMPONENTS 2002 May 06 2 Philips Semiconductors Preliminary specification Laser driver and controller circuit 1 FEATURES TZA1032 * Separate 3.3 V digital, analog and output driver power supplies * Selective power-down of internal functions via I2C-bus for power saving * Low voltage-swing of the differential Run Length Limited Code (RLC) inputs for high speed transmission and good electromagnetic compatibility * High-impedance input switching to control two or more TZA1032 ICs in parallel for double writer applications * Supports I2C-bus interface up to 400 kbits/s with block transfer feature in slave mode only * 3.3 and 5 V tolerant input logic * Supports any RLC code with run lengths from 1 to 15 * Automatic write-read switching for run lengths 16 * Channel decoding rate up to 105 Mbits/s, according to DVD 4x * Look back function to enable write pre-compensation by data dependent write strategy with a land-pit compensation up to five * Supports Forced Erase (FE) mode for quick initialisation of disc * Fixed propagation delay within RLC clock periods to allow accurate data linking on disc * Supports CD-R, CD-RW, DVD+RW, DVD-R, DVD-RW and DVR formats or any comparable existing or future format * Programmable write strategy via I2C-bus; completely flexible up to a maximum of two output level transitions per RLC clock period * Pulse timing resolution of 2 ns at 500 MHz internal clock * Minimum pulse width of 4 ns at 500 MHz internal clock * Four programmable threshold current levels with an 8-bit resolution, and eight programmable delta levels with an 8-bit resolution * Independent laser threshold and laser delta current control * Programmable modulation unit * Pointer memory mapping to allow compact write strategy coding * PLL oscillator features a self-learning oscillator mode for non-locked operation during read * Wide frequency range: PLL locking factor 2.5 * Two output channels, delta and threshold current levels, each capable of delivering 240 mA delta and 200 mA threshold peak current to the output * Rise and fall times of 1 to 2 ns, depending on package and laser * Typical output resistance of 120 * Programmable current step size for a threshold level of 0 to 1 mA at a 16-bit resolution, and a delta level of 0 to 1.2 mA at an 8-bit resolution * Internal modulator up to 565 MHz * Forward Sense (FS) Laser Power Control (LPC) loop to compensate laser drift due to temperature and aging * Internal set point generation to allow read-write switching without any transient effects * Digital LPC algorithm based on FS feedback * Single forward sense diode connection * Programmable FS input current gain to allow for spread in FS efficiency * Supports running Optimum Power Control (OPC) loop, so called alpha loop, to monitor and control the quality of writing * Programmable loop bandwidths: up to 1 kHz for the LPC, and up to 50 kHz for the alpha loop * Programmable minimum and maximum limiting of laser currents and running OPC range * Programmable OPC stepper. 2 GENERAL DESCRIPTION The TZA1032 is a laser driver circuit which is intended for a wide range of recordable and re-writable optical drives. Figure 3 shows a function diagram of TZA1032 in relation to a disc recording system. The TZA1032 is intended to be located close to the laser diode on the Optical Pick-up Unit (OPU). It can be used in CD-R/RW systems with 1x, 2x, 4x, 8x, 12x, 16x and 24x (24x is not guaranteed yet: evaluation pending) speed and in DVD-R/RW systems with 1x, 2x and 4x speed (4x is not guaranteed yet). Furthermore, it is suitable for future standards like DVR. 2002 May 06 3 Philips Semiconductors Preliminary specification Laser driver and controller circuit The TZA1032 fulfils three main functions: * Drives the laser with a sequence of programmable write strategy pulses with high timing accuracy and high peak current levels * Encodes the input modulated data to a sequence of write strategy pulses. This encoding is flexible with respect to input modulation code (EFM, EFMplus, 17 pp, etc.). Any RLC with run lengths in the range from 1 to 15 is possible. The write strategy is programmable with high flexibility for CD-R/RW, DVD-R/RW, DVR or other optical recording systems using comparable write strategies. For this purpose the TZA1032 includes two Random Access Memories (RAMs) which can be loaded (non real-time) via an I2C-bus from a PC or microcontroller * Controls the exact light power levels coming from the laser and controls the exact power absorbed by the disc during recording. This is not trivial since the laser characteristics (both threshold and gain) are strongly temperature dependent. A first control loop controls the laser power levels based on the signal from a forward sense diode (FS control). This will make the laser virtually temperature and aging independent. The loop is fully self-contained, only an external forward sense diode must be connected. A second control loop controls the laser power based on an alpha signal, generated by additional electronics based on signals from the diode during writing. It is primarily intended to compensate for writing performance variations due to 3 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TZA1032UK - bare die with solder bumps DESCRIPTION TZA1032 imperfections in the optical path and/or disc (e.g. finger prints). The alpha signal is a measure of the power absorption of the disc material during the writing process or in general of the writing quality on the disc. For this second loop, a method of stepping the set point under external control is provided. The TZA1032 contains a programmable counter that can be clocked via the external OPC-strobe (pin OPC). This function is typically used during OPC in order to calibrate the optimum laser writing power. When required, non-real time control is possible via an interrupt feedback signal at pin IRQ. The TZA1032 can supply the analog, digital and driver part separately to obtain maximum performance. The TZA1032 features three independent power supplies. These are the analog and digital power supplies and a local power supply for the laser driver function. The supplies can be delivered separately to obtain maximum output performance of the TZA1032 in environments with large and highly dynamic current flows. The driver supply has no accompanying ground because the laser driver block only sources current to the laser. Ensure that all power supply pins are connected to the appropriate voltage rails. For evaluation purposes only (by special request) the TZA1032 can be delivered in a LQFP64 package. VERSION - 2002 May 06 4 Philips Semiconductors Preliminary specification Laser driver and controller circuit 4 QUICK REFERENCE DATA SYMBOL VDD[1 to 3] IOUT[1 to 3] ROUT[1 to 3] tr, tf rlmin BLPC(-3dB) Balpha(-3dB) fmod PARAMETER output supply voltage output current (threshold) output current (delta) output resistance rise and fall time decodable run length -3dB LPC bandwidth -3dB alpha bandwidth modulator frequency PLL locked to external clock PLL in Current Controlled Oscillator (CCO) mode tW(min) tres minimum pulse width timing resolution depends on package and load CONDITION 1 0 - - 1 - - 250 240 MIN. 3.0 3.3 - - 120 - - 1 50 - - TYP. TZA1032 MAX. 3.6 200 240 - 1 to 2 15 - - 565 440 V UNIT mA mA ns kHz kHz MHz MHz 4 2 - - - - ns ns 2002 May 06 5 Philips Semiconductors Preliminary specification Laser driver and controller circuit 5 BLOCK DIAGRAM TZA1032 handbook, full pagewidth 43 ES ES RDWR TZA1032UK SAMPLE TIMING GENERATOR 44 42 DATAP DATAN 25 26 RLC DIFFERENTIAL RECEIVER Data RLC DECODER RLC to WS & SETPOINT POWER CONVERTER threshold 3 MULTIPLYING CURRENT DACs 1, 2, 49 50, 51, 52 3 4 VDD CLKP CLKN 24 23 Clk delta (8 bits) OUT[1 to 3] VSS Reference_clock Feedback_clock Strategy_clock REFH REFL 31 I_threshold_DAC_ref 32 ANALOG REFERENCE PLL I_delta_DAC_ref Analog Ref Output_clock Lock_clock 20 LCA clock LCD clock FS_ADC LASER CONTROL DIGITAL Alpha_ADC P_readSet P_writeSet LASER CONTROL ANALOG threshold (16 bits) delta (8 bits) n.c. FS CFS 45 33 REFERENCE DACs AMEAS LASP 34 35 Analog Ref LPC LOOP; ALPHA LOOP AND OPC AEZ OPC 37 15 LCD clock LasP_DAC RDWR 5, 6, 7 3 2 9, 10 13 11, 12 I2C-BUS INTERFACE POWER-ON RESET Supply ANALOG POWER DIGITAL POWER TEST INTERFACE 2 36 39 29 28 TEST[2 to 0] TEST_IN[1 to 0] TEST_CLK TEST_OUT[1 to 0] FSPLUS FSMIN IVREFCON IVCON SCL SDA IRQ 40 41 14 to all blocks I2C_A0 16 3 3 4 8, 17, 21, 38 VDDD 3 3, 18, 47 MGW501 22, 27, 19, 30, 46 48 VDDA VSSA VSSD Fig.1 Block diagram. 2002 May 06 6 Philips Semiconductors Preliminary specification Laser driver and controller circuit 6 PINNING SYMBOL VDD2 VDD3 VSSD3 VSS VDDD3 IRQ PAD 1 2 3 4 8 14 TYPE P P P P P O laser driver power supply laser driver power supply IC digital ground laser driver ground IC digital power supply DESCRIPTION TZA1032 interrupt request; digital output (open drain sink). IRQ is an active LOW interrupt service request output line to the microprocessor. This line is set (made LOW) by internal laser driver events and is cleared (made HIGH) when a register in the laser driver is read via I2C-bus. OPC strobe; digital input with pull-down resistor. The system controller during OPC issues the OPC (strobe) signal. This signal tells the laser driver that a step in a set point value should be made during OPC mode. digital input pin with pull-down resistor whose function is to select which I2C-bus address range applies to the IC. This allows two laser drivers to be used in parallel on one I2C-bus. This pin is also used as test mode selection pin for test mode. IC digital power supply IC digital ground IC analog ground not connected IC digital power supply IC analog power supply clock pulse; analog current input. The anti-phase clock signal is used together with CLKP to allow balanced transmission. clock pulse; analog current input. Provides clock reference for EFMplus data plus the clock reference for the internal PLL. data input; analog current input. This is the input for the run length variable code (in non-return to zero form) from which the laser driver knows which laser pulses to generate. data input; analog current input. The anti-phase data signal (CLKN) used together with DATAN to allow balanced transmission. IC analog power supply IC analog ground band-gap reference output (for external smoothing capacitor) band-gap ground connection (for external smoothing capacitor) capacitor forward sense; analog connection for external smoothing capacitor. An external capacitor of 560 pF combined with an internal resistor of 70 k can be used to create a RC filter for the FS input before the ADC unit in order to prevent slew-rate effects. This capacitor is placed between this pin and REFL. OPC 15 I I2C_A0 16 I VDDD1 VSSD1 VSSA1 VSSD4 VDDD4 VDDA1 CLKN CLKP DATAP 17 18 19 20 21 22 23 24 25 P P P P P P I I I DATAN VDDA2 VSSA2 REFH REFL CFS 26 27 30 31 32 33 I P P O O O 2002 May 06 7 Philips Semiconductors Preliminary specification Laser driver and controller circuit TZA1032 SYMBOL AMEAS PAD 34 TYPE I DESCRIPTION alpha measure; analog current sink input. AMEAS (alpha measure) is the value of the measured disk writing quality. This is used in the alpha control loop in order to regulate the actual laser power as a function of non-laser system and medium drift. laser power; analog current source output. Pin LASP indicates the laser power level. The read power is constant and the write power level (which is added during laser driver write mode) is alpha corrected. This signal is used in order to normalise signals with respect to laser power. alpha error zero; digital input with pull-down resistor. Depending on the programming of an internal mode bit one of two effects occurs when this input is asserted. alpha error zero (AEZ): the output of the alpha error adder is forced to zero. alpha set zero (ASZ): the alpha error adder positive input (i.e. the alpha set point) is forced to zero. LASP 35 O AEZ 37 I VDDD2 SCL SDA RDWR ES 38 40 41 42 43 P I I/O O O IC digital power supply digital input for I2C-clock (the laser driver is a slave device) digital bi-directional port with open-drain sink output for I2C-bus data read-write; digital output line. This signal indicates whether the laser driver is in read mode (HIGH) or write mode (LOW). analog output line. This signal indicates when valid signals from the photo-detector can be expected for sampling purposes (used in CD-R applications). analog output line. The ES anti-phase signal used together with ES to allow balanced transmission. forward sense; analog current sink input. This is the value of the measured laser power (e.g. measured by a photodiode which receives a set fraction of laser output directly). This is used in the laser power control loop in order to regulate the actual laser power to a given set of values as a function of laser temperature drift. IC analog power supply IC digital ground IC analog ground laser driver power supply analog current output to the laser analog current output to the laser analog current output to the laser ES FS 44 45 O I VDDA3 VSSD2 VSSA3 VDD1 OUT1 OUT2 OUT3 46 47 48 49 50 51 52 P P P P O O O Laser driver IC test pads TEST2 TEST1 TEST0 5 6 7 I I I digital input bus for test mode control. Normal functional mode (normal application use) is: all pins with an internal pull-down resistor and code = 0. digital input bus for test mode control. Normal functional mode (normal application use) is: all pins with an internal pull-down resistor and code = 0. digital input bus for test mode control. Normal functional mode (normal application use) is: all pins with an internal pull-down resistor and code = 0. 2002 May 06 8 Philips Semiconductors Preliminary specification Laser driver and controller circuit TZA1032 SYMBOL TEST_IN1 TEST_IN0 TEST_OUT1 TEST_OUT0 TEST_CLK IVCON IVREFCON FSPLUS FSMIN PAD 9 10 11 12 13 28 29 36 39 TYPE I I O O I O O O O DESCRIPTION digital input bus with internal pull-down resistors for test data input. High-impedance state in functional mode. digital input bus with internal pull-down resistors for test data input. High-impedance state in functional mode. digital output bus for test data output. High-impedance state in functional mode. digital output bus for test data output. High-impedance state in functional mode. digital input pin with internal pull-down resistor for test data clock. High-impedance state in functional mode. analog current output related to the PLL loop-filter. High-impedance state in functional mode. analog current output related to the PLL loop-filter. High-impedance state in functional mode. analog voltage output from LCA FS/alpha pre-amp circuit. High-impedance state in functional mode. analog voltage output from LCA FS/alpha pre-amp circuit. High-impedance state in functional mode. 2002 May 06 9 Philips Semiconductors Preliminary specification Laser driver and controller circuit TZA1032 handbook, full pagewidth IVREFCON FSPLUS AMEAS VDDD2 SCL SDA RDWR ES ES FS VDDA3 VSSD2 VSSA3 VDD1 OUT1 OUT2 OUT3 39 38 37 36 35 34 33 32 31 30 29 28 27 40 26 41 42 43 44 45 46 47 48 49 50 51 52 1 2 3 4 5 6 7 8 9 25 24 23 22 21 VDDA2 VSSA2 IVCON FSMIN REFH LASP REFL CFS AEZ DATAN DATAP CLKP CLKN VDDA1 VDDD4 VSSA1 VSSD1 VDDD1 I2C_A0 OPC IRQ TZA1032UK 20 19 18 17 16 15 14 10 11 12 13 VDD2 VDD3 VSSD3 TEST_OUT1 TEST_OUT0 TEST_CLK TEST2 TEST1 TEST0 VDDD3 TEST_IN1 TEST_IN0 VSS MGW503 Pad number 20 is not connected. Fig.2 Bare die with solder bumps (flip-chip). 2002 May 06 10 Philips Semiconductors Preliminary specification Laser driver and controller circuit 7 7.1 FUNCTIONAL DESCRIPTION The I2C-bus interface TZA1032 The TZA1032 has two possible I2C-bus addresses that can be selected via pin I2C_A0, an active HIGH digital CMOS input. This allows two TZA1032 ICs to be independently applied using the same I2C-bus (e.g. for double write applications), one with pin I2C_A0 HIGH and the other with pin I2C_A0 LOW. The TZA1032 operates as a slave only I2C-bus device. Table 1 TZA1032 I2C-bus addresses I2C_A0 0 = LOW 1 = HIGH I2C-BUS WRITE ADDRESS 1101 1100 (DCH) 1101 1110 (DEH) I2C-BUS READ ADDRESS 1101 1101 (DDH) 1101 1111 (DFH) Each I2C-bus register has an 8-bit register address bus. The various modes in which an external controller can use the I2C-bus interface are shown in Table 2. The special RAM Write mode allows fast block transfer of data via one single I2C-bus register address. Table 2 I2C-bus communication modes supported by TZA1032 I2C-BUS INFORMATION start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; data_to_register_address (n); acknowledge; stop start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; data_to_register_address (n); acknowledge; data_to_register_address (n + 1); acknowledge; .... ; data_to_register_address (n + r); acknowledge; stop start; TZA1032_write_address; acknowledge; register_address (= RAM x), acknowledge; data_to_RAM x (0), acknowledge; data_to_RAM x (1), acknowledge; .... ; data_to_RAM x (m); acknowledge; stop start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; stop start; TZA1032_read_address; acknowledge; data_from_register_address (n); acknowledge; stop start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; start; TZA1032_read_address; acknowledge; data_from_register_address (n), acknowledge; data_from_register_address (n); acknowledge; .... ; data_from_register_address (n); acknowledge; stop I2C-BUS MODE Write Incremental write RAM write Read Successive read 7.2 Interrupt request The IRQ is built as an active LOW open-drain output pin so it can be linked to the system controller together with similar signals in a wired-or approach. An IRQ register is present to select the conditions which can cause the IRQ line to be active. Possible conditions for an interrupt can be overrun or under-run of threshold or delta laser current or several other selectable conditions. The status register allows extra signals to be monitored in non-interrupt mode (e.g. by polling). The IRQ and status registers in combination with the IRQ line allow a very efficient way of controlling TZA1032. In addition, the IRQ_enable register allows selectable masking of most of the IRQ conditions to the IRQ line. 2002 May 06 11 Philips Semiconductors Preliminary specification Laser driver and controller circuit 7.3 Soft reset and power-down TZA1032 The PLL can be used in closed loop or as a stable open-loop oscillator (in read mode for example) when no input clock is present. For this purpose the PLL features a self-learning oscillator mode for non-locked operation. Furthermore, the PLL is designed for wide range frequency locking (factor 2.5). The frequency multiplication factor is programmable for flexible selection of write strategy timing resolution for different standards (CD 1x to 24x, DVD 1x, 2x, 4x and DVR). For PLL characteristics see Table 3 for the possible PLL frequencies and write strategy resolutions with respect to the incoming RLC clock. The TZA1032 features are much more flexible than shown in Table 3. The PLL frequency and write strategy resolution can be programmed according to the specific requirements of the user. TZA1032 has a soft reset register that can reset most of the internal blocks, and is automatically synchronized with the I2C-bus SCL input. Most of the blocks in the TZA1032 are provided with a power-down input. The IC features a special power-down register which can be programmed via I2C-bus. An active bit in the register causes a block to go into a low dissipation standby mode. This offers the user the possibility to save power when TZA1032 operates in a register mode (e.g. during read). 7.4 The Phase Locked Loop The PLL is phase locked to the incoming RLC clock signal. A single external clock signal is sufficient for a complete task of TZA1032. The PLL unit provides all internal clocking with the exception of the I2C-bus interface that can run on its own SCL clock. Table 3 Examples of PLL clock ratio programming STANDARD CD x 1 CD x 2 CD x 4 CD x 8 CD x 12 CD x 16 CD x 24 DVD x 1 DVD x 2 DVD x 2.5 DVD x 4 DVR-1 DVR-2 Note RLC FREQUENCY frlc (MHz) 4.3218 8.6436 17.2872 34.5744 51.8616 69.1488 103.7232 26.16 52.32 65.4 104.64 65.625 93.75 PLL FREQUENCY fo (MHz) 518.616 518.616 553.1904 553.1904 414.8928 553.1904 414.8928 523.2 523.2 392.4 418.56 525 562.5 WRITE STRATEGY RESOLUTION(1) 8 8 8 8 8 8 4 20 10 6 4 8 6 1. The write strategy resolution is defined as the number of bits per RLC clock period. 7.5 The differential receiver A differential RLC receiver (DRX) with low voltage-swing is present to allow high data rates in combination with low electromagnetic interference. The receiver features impedance matching with typical flex foils. Furthermore, single side operation is optionally possible by connecting additional external resistors. High-impedance input switching allows two or more TZA1032 ICs to operate in parallel. The high-impedance input switch is controlled by a single I2C-bus control register that can individually select DRX clock and/or data lines for high-impedance mode. A high-impedance input mode is also entered during Reset or power-down. 2002 May 06 12 Philips Semiconductors Preliminary specification Laser driver and controller circuit Table 4 Truth table for RLC differential receiver; note 1 POWER-DOWN L L H L L L High_Z L L X H X X High_Z_clk L L X X H X Reset H H X X X H OUT H L H H H H BIAS on on off on on on TZA1032 CLOCK INPUT CLKP CLKN X X X X Note INPUT SWITCH closed closed open (high impedance) open (high impedance) open (high impedance) open (high impedance) 1. X = don't care; L = LOW; H = HIGH. 7.6 The RLC decoder The RLC decoder and write strategy generator feature a look back function to enable write pre-compensation by data dependent write strategies. The write strategy for the current received run length (rlcn) depends on the previous received run length (rlcn-1). Table 5 shows that TZA1032 is capable of decoding 64 possible combinations of rlcn and rlcn-1 including a read state. The read state is entered after detecting run lengths 16. The decoder automatically toggles between the status write and erase in normal writing mode, and the RLC data inputs can be made edge sensitive only, or edge and level sensitive. It should be noticed that erase strategies are possible. A forced erase mode can be entered via I2C-bus for quick disc initialisation. The RLC decoder (and the complete TZA1032) have a fixed propagation delay of 28 RLC clock periods to allow accurate data linking on disc. Table 5 rlcn Read E1 E2 E3 E3 E3 E3 E4 E4 E4 E4 E5 E5 E5 E6 E7 Note 1. X = don't care; E = erase; W = write. 2002 May 06 13 List of possible RLC decoder combinations; note 1 rlcn-1 X X X W3 W4 W5 X W3 W4 W5 X W3 W4 X X X EFFECT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 rlcn E8 E9 E10 E11 E12 E13 E14 E15 W1 W1 W1 W1 W1 W1 W2 W2 rlcn-1 X X X X X X X X E1 E2 E3 E4 E5 X E1 E2 EFFECT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 rlcn W2 W2 W2 W2 W3 W3 W3 W3 W3 W3 W4 W4 W4 W4 W4 W4 rlcn-1 E3 E4 E5 X E1 E2 E3 E4 E5 X E1 E2 E3 E4 E5 X EFFECT 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 rlcn W5 W5 W5 W5 W5 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 rlcn-1 E1 E2 E3 E4 E5 X X X X X X X X X X X EFFECT 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 Philips Semiconductors Preliminary specification Laser driver and controller circuit 7.7 Write strategy generator TZA1032 Internal set point generation is present to allow read-write switching without any transient effects. A digital loop filter with programmable loop gain is used. This allows tailoring of loop bandwidth according to the requirements of the application. A unique laser power control algorithm is used. This algorithm ensures not only average power control but it really makes the laser virtual temperature and aging independent for any possible write strategy. This loop operates with or without the alpha (running OPC) loop. The TZA1032 supports a full running optimum power control loop when required by the user. The loop is also referred to as the alpha loop. The input signal is based on disc Absorption MEASurements (AMEAS). This signal is processed in a similar way as the FS input current. A current input is provided with programmable gain (4-bit) and an 8-bit ADC is used. Again a digital loop filter with programmable loop gain is used. This allows tailoring of loop bandwidth according to the requirements of the application. The alpha loop does not interfere with the FS laser power control loop. Therefore, both control loops can be used simultaneously. The set point is programmable via I2C-bus or is under control of a programmable OPC stepper. The write strategy generator makes use of pointer memory mapping to allow compact write strategy coding. Only 1600 bytes have to be transferred to TZA1032 to load the most complex write strategy including write pre-compensation. Due to the pointer memory structure common strategies can be loaded in an even more compact manner (e.g. CD strategies). Loading can be done efficiently via I2C-bus block transfer mode. The write strategy code includes: * Data for selection of output power levels from 4 threshold and 8 delta values (these 8-bit values can be programmed asynchronously via I2C-bus) * Pulse timing information * Modulation information. The modulation information enables the user to switch on modulation in pre-selected parts of the write strategy on a real time basis. The modulation amplitude can be programmed asynchronously via I2C-bus. 7.8 Laser Power Control The Forward Sense Diode (FSD) is a reversed biased diode that receives a small percentage of the laser output light and converts it into a current. The FSD can be connected directly to the TZA1032 without additional components. The TZA1032 features a current input with programmable gain (6-bit resolution). Furthermore a 12-bit ADC is used. 2002 May 06 14 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... ull pagewidth 2002 May 06 15 8 Philips Semiconductors Laser driver and controller circuit FUNCTIONAL DIAGRAM SCL, SDA, IRQ, I2C_A0 I2C-BUS INTERFACE PLL POR TZA1032 ALPHA LOOP TIMING & CONTROL FS ES, ES, RDWR, LASP THRESHOLD CURRENT REFERENCE - + DIGITAL LOOP FILTERING LPC + + MULTIPLYING CURRENT DACs Threshold + Delta Delta_REF OUT laser light forward sense VFS + laser laser light LASER POWER SETPOINT GENERATOR Alpha MEASURE (AMEAS) - + DIGITAL LOOP FILTERING ALPHA + + PHOTO DETECTOR & PREAMPS RLC TO WS CONVERTER DISK OPC, AEZ ALPHA SETPOINT & OPC STEPPER DELTA CURRENT REFERENCE RLC DECODER ALPHA MEASURE PROCESSING EFM(P) DATA SOURCE (ENCODER) clock and data (CLKP, CLKN, DATAP, DATAN) MGW500 Preliminary specification TZA1032 Fig.3 Functional diagram of TZA1032 in relation to a disc recording system. Philips Semiconductors Preliminary specification Laser driver and controller circuit 9 CHARACTERISTICS SYMBOL Current driver VDD[1 to 3] IOUT[1 to 3] ROUT[1 to 3] tr, tf PLL fo(R) fo(W) fi(rlc) VFS IFS PLL output frequency(1) PLL output frequency PLL input frequency read mode write mode 240 320 0 375 523.2 26.16 440 565 105 output supply voltage output current (threshold) output current (delta) output resistance rise and fall times depends on package and load 3.0 1 0 - - 3.3 - - 120 - 3.6 200 240 - PARAMETER CONDITIONS MIN. TYP. TZA1032 MAX. UNIT V mA mA ns 1 to 2 MHz MHz MHz FS buffer and ADC combination voltage at pin FS current at pin FS DC input current N B-3dB Reg_FS resolution analog bandwidth programmable gain register 6 bits code -2048 code 2047; nominal gain signed virtual ground 1.220 0 - - - 3.08 0 1.225 1000 0 1000 12 4.06 - 100 1.4 8 0 100 650 - 0 0 120 120 1.230 4000 - - - 5.64 63 A V bit A A kHz V A A A bit kHz Alpha buffer and ADC Ialpha Valpha N I_alpha B-3dB Alpha_Reg DRX input IDRXD(HIZ) IDRXC(HIZ) VDATA VCLK DRX data input current DRX clock input current DRX data input voltage DRX clock input voltage high-impedance mode high-impedance mode low-impedance mode low-impedance mode 0 0 - - 100 100 - - A A mV mV input current input voltage resolution DC input current analog bandwidth programmable gain register 4 bits into pin AMEAS virtual ground signed code -128 code 127; nominal gain 0 1.3 - - - 520 0 400 1.5 - - - 850 15 I2C-bus interface RON(SDA) RON(SCL) Note 1. Use low range CCO mode only. on resistance SDA line on resistance SCL line 100 100 150 150 250 250 2002 May 06 16 Philips Semiconductors Preliminary specification Laser driver and controller circuit 10 APPLICATION INFORMATION A typical application diagram of the TZA1032 is shown in Fig.4. As can be seen from this figure the CLKP, CLKN, DATAP and DATAN inputs allow differential data transfer for electromagnetic compatibility issues. Input series resistors can be connected to obtain low voltage swing when using standard 3.3 or 5 V drivers. This will further reduce electromagnetic interference. This application diagram shows separated 3.3 V supplies to obtain maximum output performance. Only few decoupling capacitors are needed for the total application. TZA1032 The forward sense loop is fully self-contained. Only a forward sense diode has to be connected, which can be biased with an external voltage. The TZA1032 can be mounted with `flip-chip' technology as a bare die on the flex foils. For this purpose the bond pads of the silicon die can be bumped with solder dots. In this configuration parasitic components (e.g. inductors) can be further reduced leading to even better performance of the TZA1032. 2002 May 06 17 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 2002 May 06 MAIN PCB FLEX-V3 100 nF FSPLUS VSSA IVREFCON VFS VSSD AMEAS VDDD2 FSMIN LASP 100 nF VSSA forward sense SCL SDA VFS 3.3 V 220 F VDDD 100 nF 3.3 VDDA 100 nF PREPROCESSOR RDWR 42 ES ES FS VDDA3 VSSD2 VSSA3 VDD1 49 SCL I2C-bus SDA OUT1 OUT2 OUT3 laser (1, 2) VDD2 50 51 52 1 VDD3 2 3 VSSD3 4 VSS 5 TEST2 6 TEST1 7 TEST0 8 VDDD3 TEST_IN1 9 10 TEST_IN0 11 TEST_OUT1 12 TEST_OUT0 13 TEST_CLK 10 k 17 16 OPC 15 14 IRQ 43 44 45 46 47 48 24 CLKN 23 22 21 VDDA1 VDDD4 VSSD4 VSSA1 VSSD1 VDDD1 I2C_A0 SYSTEM CONTROLLER 1.8 k 39 40 41 38 37 36 35 34 33 REFL CFS AEZ choke handbook, full pagewidth Philips Semiconductors Laser driver and controller circuit ALPHAPROCESSING 560 nF 32 31 30 29 28 VDDA2 27 26 DATAP 25 CLKP 1.8 k ENCODER 1.8 k VSSA2 IVCON REFH DATAN 1.8 k TZA1032UK (bare die) pad not 20 bumped 19 18 18 3.3/5 V Vbias 220 F VDD choke C(laser) 220 nF C(bias) 100 nF VSSD VDDD Preliminary specification MGW504 TZA1032 (1) The loop format by OUT1, OUT2 and OUT3, laser anode, laser cathode, C(laser) and VDDD must be kept as small as possible. (2) The ground pad of C(bias) must be placed as close to VSS as possible. Fig.4 Typical application diagram for TZA1032UK on flex foil. Philips Semiconductors Preliminary specification Laser driver and controller circuit 11 BONDING PAD LOCATIONS COORDINATES(1) SYMBOL VDD2 VDD3 VSSD3 VSS TEST2 TEST1 TEST0 VDDD3 TEST_IN1 TEST_IN0 TEST_OUT1 TEST_OUT0 TEST_CLK IRQ OPC I2C_A0 VDDD1 VSSD1 VSSA1 VSSD4 VDDD4 VDDA1 CLKN CLKP DATAP DATAN VDDA2 IVCON IVREFCON VSSA2 REFH REFL CFS AMEAS LASP FSPLUS AEZ VDDD2 PAD x 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 -1.469 -1.2215 -0.974 -0.7265 -0.4775 -0.230 +0.019 +0.2665 +0.5155 +0.763 +1.012 +1.2595 +1.5085 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.5085 +1.2595 +1.012 +0.763 +0.5155 +0.2665 +0.019 -0.230 -0.4775 -0.7265 -0.974 -1.2215 y -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.469 -1.2215 -0.974 -0.7265 -0.4775 -0.230 +0.019 +0.2665 +0.5155 +0.763 +1.012 +1.2595 +1.5085 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 +1.758 FSMIN SCL SDA RDWR ES ES FS VDDA3 VSSD2 VSSA3 VDD1 OUT1 OUT2 OUT3 Note 39 40 41 42 43 44 45 46 47 48 49 50 51 52 SYMBOL PAD x -1.469 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 -1.758 TZA1032 COORDINATES(1) y +1.758 +1.5085 +1.2595 +1.012 +0.763 +0.5155 +0.2665 +0.019 -0.230 -0.4775 -0.7265 -0.974 -1.2215 -1.469 1. All x and y coordinates represent the position of the centre of the pad in mm with respect to the centre of the die (see Fig.5). 2002 May 06 19 Philips Semiconductors Preliminary specification Laser driver and controller circuit TZA1032 handbook, full pagewidth IVREFCON FSPLUS AMEAS VDDD2 SCL SDA RDWR ES ES FS VDDA3 VSSD2 VSSA3 VDD1 OUT1 OUT2 OUT3 39 38 37 36 35 34 33 32 31 30 29 28 27 40 26 41 42 43 44 45 46 47 48 49 50 51 52 1 2 3 4 5 6 7 8 9 25 24 23 22 21 VDDA2 VSSA2 IVCON FSMIN REFH LASP REFL CFS AEZ DATAN DATAP CLKP CLKN VDDA1 VDDD4 n.c. VSSA1 VSSD1 VDDD1 I2C_A0 OPC IRQ x 0 0 y 20 19 18 17 TZA1032UK 16 15 14 10 11 12 13 VDD2 VDD3 VSSD3 VDDD3 TEST2 TEST1 TEST0 TEST_IN1 TEST_IN0 TEST_OUT1 TEST_OUT0 TEST_CLK VSS MBL538 Fig.5 Bonding pad locations. 2002 May 06 20 Philips Semiconductors Preliminary specification Laser driver and controller circuit 12 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS TZA1032 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Preliminary data Qualification Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 13 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2002 May 06 21 Philips Semiconductors Preliminary specification Laser driver and controller circuit TZA1032 Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. 15 PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2002 May 06 22 Philips Semiconductors Preliminary specification Laser driver and controller circuit NOTES TZA1032 2002 May 06 23 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. (c) Koninklijke Philips Electronics N.V. 2002 SCA74 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/01/pp24 Date of release: 2002 May 06 Document order number: 9397 750 08652 |
Price & Availability of TZA1032
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |